Smartbox turbo настроить под ситилинк

Smartbox turbo настроить под ситилинк

SmartBOX Pro / SmartBOX Turbo+ / SmartBox Giga – обсуждение
Wi-Fi Router: [email protected] C2/T4 | 256m/128m RAM DDR-3 | 256m/128m NAND | 2.4GHz/5GHz | 1Gbit/s | USB 3.0

Производитель (OEM / ODM) : SerComm SQ191
(Расчетная) дата выпуска: ноябрь 2019 г.
Страна производства: Китай
Серия: AC1200
Тип: беспроводной маршрутизатор, CPE
Идентификатор FCC: отсутствует
Идентификатор печатной платы: DBE00B-1.6MM
Питание: 12 В постоянного тока, 1,5 А
Тип разъема: бочка
CPU1: MediaTek MT7621AT ( 880 МГц , 2 ядра )
FLA1: 128 МиБ ( Macronix MX30LF1G18AC-ТИ)
RAM1: 256 Мб ( Nanya NT5CC128M16JR-ЕК)

ПЧ расширения: USB 3.0
Порты USB: 1
Последовательный порт: да, 4-контактный разъем, J4
Wi1 chip1: MediaTek MT7603EN
wi1 802dot11 протоколы: левов
wi1 MIMO — конфигурации: 2×2: 2
wi1 разъем антенны: U.FL
WI2 chip1: MediaTek MT7613AEN
WI2 802dot11 протоколы: + AC
WI2 MIMO — конфигурации: 2×2: 2
WI2 разъем антенны: U.FL
Микросхема ETH1: MediaTek MT7621AT
Коммутатор: MediaTek MT7621AT
Скорость LAN: 1GbE, 100MbE
Порты LAN: 2
Скорость WAN: 1GbE
Порты WAN: 1
802.11abgn + ac
Стандартный загрузчик: U-Boot
Стандартная прошивка ОС: Linux 3.10.14

  • Сток 2.0.19
  • Установка Openwrt/LEDE от Netgear R6220
  • SmartBox PRO Пандора c загрузчиком Breed подробно
  • SmartBox PRO — Чистый OpenWRT 19.07.3(release branch) c 256Мб RAM и 256Мб Flash
  • Прописываем mac адреса в openwrt SmartBox
  • Предупреждение: светодиодная индикация на данных прошивках отсутствует.
  • OpenWrt 19.07.5 для SmarBox Pro и Smartbox Turbo+ Для устройств с модифицированным загрузчиком от inflabz (Исправлена светодиодная индикация)
  • Padavan для Smart Box PRO для памяти NAND
  • Готовые автосборки rooter

  • Замена «битых» NAND на SPI flash и прошивка Openwrt для Beeline Smart Box Turbo+
  • Как прошить через телнет
  • Прошивка с обходом бед блоков
  • Настройка модема на open wrt
  • Как прикрутить 4g модем к SmartBox Pro
  • Фото платы SmartBOX PRO 1.0
  • Какие контакты задействованы
  • Смена загрузчика на Giga
  • Обратите внимание на ограничение скорости передачи данных по usb на стоковой прошивке: чтение ≈ 15 МБ/с, запись ≈ 10 МБ/с
  • Скорости чтения с флэшки через USB-разъем роутера на прошивке «китайский форк Падавана
  • Прошивка (без перепайки) Smartbox Pro на прошивки Pandorabox и LEDE.
  • Jtag
  • Для тех, кто окирпичbл SmartBOX Turbo+ и теперь он перемигивается зеленым и красным светодиодом + Дополнение
  • Возможный способ раскирпичивания (мигают зеленый и красный диод) без uart
  • Добавление лого Turbo+ в прошивке Padavan
  • Делаем «правильные» MAC’и в OpenWRT
  • # ВАЖНО [Охлаждение] Информация о доработке.
  • Доработка охлаждения от butaford
  • В тему охлаждения
  • Упоминание по прошивке для nand с Bad блоками
  • Обрезка mtd2 до 256кБ
  • Прошивка и активация Zigbee модуля в Smart Box Turbo+
  • # Учетка СуперЮзера . Логин: SuperUser Пароль: Beeline$martB0x или серийный номер (по данным статьи на Муське)
  • Блог Билайн на Хабре
  • OpenWRT 19.07.4 для SmartBox PRO с модифицированным загрузчиком breed от Xiaomi
  • O /usr/bin/wifi_schedule.sh forcestop && /usr/bin/wifi_schedule.sh start
  • OpenWRT. Протокол L2TP: Проблемы и их решения
  • Скрипт для перезапуска USB модемов по питанию
  • Управляем питанием USB порта SmartBox Giga
  • Подключение по UART на SmartBox Giga
  • ДАМП Smartbox Flash сток 1.00.13_beta4
  • Дамп SmartBox Pro, стоковая прошивка: Dump_SB-Pro_Nand.7z ( 28,17 МБ )

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system type : MT7621
machine : Unknown
processor : 0
cpu model : MIPS 1004Kc V2.15
BogoMIPS : 583.68
wait instruction : yes
microsecond timers : yes
tlb_entries : 32
extra interrupt vector : yes
hardware watchpoint : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
isa : mips1 mips2 mips32r1 mips32r2
ASEs implemented : mips16 dsp mt
shadow register sets : 1
kscratch registers : 0
core : 0
VPE : 0
VCED exceptions : not available
VCEI exceptions : not available

processor : 1
cpu model : MIPS 1004Kc V2.15
BogoMIPS : 583.68
wait instruction : yes
microsecond timers : yes
tlb_entries : 32
extra interrupt vector : yes
hardware watchpoint : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
isa : mips1 mips2 mips32r1 mips32r2
ASEs implemented : mips16 dsp mt
shadow register sets : 1
kscratch registers : 0
core : 0
VPE : 1
VCED exceptions : not available
VCEI exceptions : not available

processor : 2
cpu model : MIPS 1004Kc V2.15
BogoMIPS : 583.68
wait instruction : yes
microsecond timers : yes
tlb_entries : 32
extra interrupt vector : yes
hardware watchpoint : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
isa : mips1 mips2 mips32r1 mips32r2
ASEs implemented : mips16 dsp mt
shadow register sets : 1
kscratch registers : 0
core : 1
VPE : 0
VCED exceptions : not available
VCEI exceptions : not available

processor : 3
cpu model : MIPS 1004Kc V2.15
BogoMIPS : 583.68
wait instruction : yes
microsecond timers : yes
tlb_entries : 32
extra interrupt vector : yes
hardware watchpoint : yes, count: 4, address/irw mask: [0x0ffc, 0x0ffc, 0x0ffb, 0x0ffb]
isa : mips1 mips2 mips32r1 mips32r2
ASEs implemented : mips16 dsp mt
shadow register sets : 1
kscratch registers : 0
core : 1
VPE : 1
VCED exceptions : not available
VCEI exceptions : not available

===================================================================
MT7621 stage1 code 10:33:11 (ASIC)
CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR.
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL3 FB_DL: 0x0, 1/0 = 952/72 01000000
PLL4 FB_DL: 0xe, 1/0 = 534/490 39000000
PLL2 FB_DL: 0x15, 1/0 = 600/424 55000000
do DDR setting..[00320381]
Apply DDR3 Setting. (use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 11 2 120
————————————————————————— ——
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
000F:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
0010:| 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0
0011:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
rank 0 coarse = 16
rank 0 fine = 40
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_R0DELDLY[018]=00002121
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
—————————————
0 | 12 6 13 9 11 6 13 5 1 11
10 | 6 12 7 11 5 10
—————————————

U-Boot 1.1.3 (Mar 6 2018 — 19:39:59)

Board: Ralink APSoC DRAM: 128 MB
rt2880 uboot v0.00e04 05/25/2006
SERIAL_CLOCK_DIVISOR =16
kaiker,,CONFIG_BAUDRATE =57600
SDRAM SIZE:08000000
Top of RAM usable for U-Boot at: 88000000
Reserving 426k for U-Boot at: 87f94000
Reserving 1028k for malloc() at: 87e93000
Reserving 44 Bytes for Board Info at: 87e92fd4
Reserving 36 Bytes for Global Data at: 87e92fb0
Reserving 128k for boot params() at: 87e72fb0
Stack Pointer at: 87e72f98
relocate_code Pointer at: 87f94000

Config XHCI 40M PLL
Now running in RAM — U-Boot at: 87f94000

monitor_flash_len =117844
Command «mdio»: 0xa0206b28 => 0x87f9ab28
Command «nand»: 0xa020c460 => 0x87fa0460
Command «reset»: 0xa0215ecc => 0x87fa9ecc
Command «go»: 0xa020de0c => 0x87fa1e0c
Command «bootm»: 0xa020e668 => 0x87fa2668
Command «loadb»: 0xa020f328 => 0x87fa3328
Command «tftpboot»: 0xa020f958 => 0x87fa3958
Command «nm»: 0xa020ffe4 => 0x87fa3fe4
Command «mm»: 0xa0210048 => 0x87fa4048
Command «md»: 0xa02100ac => 0x87fa40ac
Command «saveenv»: 0xa0210624 => 0x87fa4624
Command «setenv»: 0xa0210f94 => 0x87fa4f94
Command «printenv»: 0xa0210674 => 0x87fa4674
Command «?»: 0xa0211268 => 0x87fa5268
Command «help»: 0xa0211268 => 0x87fa5268
Command «version»: 0xa0211128 => 0x87fa5128
Command «sc_boot»: 0xa0213ed4 => 0x87fa7ed4
Command «sc_nand»: 0xa0213f0c => 0x87fa7f0c
Command «sc_eth_test»: 0xa0213f48 => 0x87fa7f48
Command «sc_phy»: 0xa0213f84 => 0x87fa7f84
Command «sc_time»: 0xa0213fc0 => 0x87fa7fc0
Command «sc_btver»: 0xa0213ff8 => 0x87fa7ff8
Command «sc_fl_map»: 0xa0214034 => 0x87fa8034
Command «sc_endian»: 0xa0214070 => 0x87fa8070
Command «sc_ramtest»: 0xa02140ac => 0x87fa80ac
Command «sc_gpio»: 0xa02140e8 => 0x87fa80e8
Command «sc_led»: 0xa0214124 => 0x87fa8124
Command «sc_dl»: 0xa0214160 => 0x87fa8160
Allocate 16 byte aligned buffer: 87fca810
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [C2 F1 80 95 02]
Device found in MTK table, ID: c2f1, EXT_ID: 809502
Support this Device in MTK table! c2f1
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 1023
load fact bbt success
[mtk_nand] probe successfully!
mtd->writesize=2048 mtd->oobsize=64, mtd->erasesize=131072 devinfo.iowidth=8
*** Warning — bad CRC, using default environment

============================================
Ralink UBoot Version: 5.0.0.0
———————————————
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Mar 6 2018 Time:19:39:59
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 880 MHZ ####
estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL

Load Standalone from 40000
SC_DEBUG: Nand Partition Table Magic Found at 100000.

***************************************************
SC_DEBUG: Nand Partition Table Magic Found at 100000.
Entering Firmware : Everything is OK.

Kernel image header:
Image Addr: 00A00100
Image Len: 003A9C2F
Image CRC: 18227026
Start to calculate kernel_crc from 0x00a00100 .
Bad block detected at 0xa80000, first byte of oob is 0x00
Bad block detected at 0xac0000, first byte of oob is 0x00
Kernel CRC verify OK!
Kernel Addr : 0xbca00100
## Booting image at bca00100 .
Image Name: Linux Kernel Image
Image Type: MIPS Linux Kernel Image (lzma compressed)
Data Size: 3841007 Bytes = 3.7 MB
Load Address: 81001000
Entry Point: 8162c9e0
ranand_read: skip reading a fact bad block a80000 -> aa0000
ranand_read: skip reading a fact bad block ac0000 -> ae0000
Verifying Checksum . OK
Uncompressing Kernel Image . OK
boot_count2 is FF
write 1 to boot_count2
ranand_erase: start:320000, len:20000
.kernel addr :0xBCA00100
No initrd
## Transferring control to Linux (at address 8162c9e0) .
## Giving linux memsize in MB, 128

SDK 5.0.S.0
Linux version 3.10.14+ ([email protected]) (gcc version 4.6.3 (Buildroot 2012.11.1) )
.

U-Boot 1.1.3 (Mar 6 2018 — 19:39:59)
MT7621 # ?
? — alias for ‘help’
bootm — boot application image from memory
go — start application at address ‘addr’
help — print online help
loadb — load binary file over serial line (kermit mode)
md — memory display
mdio — Ralink PHY register R/W command !!
mm — memory modify (auto-incrementing)
nand — nand command
nm — memory modify (constant address)
printenv- print environment variables
reset — Perform RESET of the CPU
saveenv — save environment variables to persistent storage
sc_boot — Sercomm boot kernel command
sc_btver- Sercomm display bootloader version command
sc_dl — Sercomm upgrade command
sc_endian — Sercomm debug command to test current system endian
sc_eth_test — Sercomm: ethernet test command
sc_fl_map — Sercomm dump flash map command
sc_gpio — Sercomm gpio command
sc_led — Sercomm led command
sc_nand — Sercomm nand command
sc_phy — Sercomm R/W PHY register
sc_ramtest — Sercomm DRAM test command
sc_time — Sercomm timer command
setenv — set environment variables
tftpboot- boot image via network using TFTP protocol
version — print monitor version
MT7621 #

NetLoop,call eth_init !
Trying Eth0 (10/100-M)

Waitting for RX_DMA_BUSY status Start. done

ETH_STATE_ACTIVE!!
*** Warning: no boot file name; using ‘test.bin’
TFTP from server 10.10.10.3; our IP address is 10.10.10.123
Filename ‘test.bin’.

TIMEOUT_COUNT=10,Load address: 0x84000000

===================================================================
MT7621 stage1 code 10:33:11 (ASIC)
CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR.
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL3 FB_DL: 0x0, 1/0 = 941/83 01000000
PLL4 FB_DL: 0xe, 1/0 = 580/444 39000000
PLL2 FB_DL: 0x15, 1/0 = 547/477 55000000
do DDR setting..[00320381]
Apply DDR3 Setting. (use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
———————————————————————————
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
000F:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
0010:| 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0
0011:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
rank 0 coarse = 16
rank 0 fine = 40
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_R0DELDLY[018]=00002121
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
—————————————
0 | 12 6 13 9 11 6 13 5 1 11
10 | 6 12 7 11 5 10
—————————————

U-Boot 1.1.3 (Mar 6 2018 — 19:39:59)

Board: Ralink APSoC DRAM: 128 MB
rt2880 uboot v0.00e04 05/25/2006
SERIAL_CLOCK_DIVISOR =16
kaiker,,CONFIG_BAUDRATE =57600
SDRAM SIZE:08000000
Top of RAM usable for U-Boot at: 88000000
Reserving 426k for U-Boot at: 87f94000
Reserving 1028k for malloc() at: 87e93000
Reserving 44 Bytes for Board Info at: 87e92fd4
Reserving 36 Bytes for Global Data at: 87e92fb0
Reserving 128k for boot params() at: 87e72fb0
Stack Pointer at: 87e72f98
relocate_code Pointer at: 87f94000

Config XHCI 40M PLL
Now running in RAM — U-Boot at: 87f94000

monitor_flash_len =117844
Command «mdio»: 0xa0206b28 => 0x87f9ab28
Command «nand»: 0xa020c460 => 0x87fa0460
Command «reset»: 0xa0215ecc => 0x87fa9ecc
Command «go»: 0xa020de0c => 0x87fa1e0c
Command «bootm»: 0xa020e668 => 0x87fa2668
Command «loadb»: 0xa020f328 => 0x87fa3328
Command «tftpboot»: 0xa020f958 => 0x87fa3958
Command «nm»: 0xa020ffe4 => 0x87fa3fe4
Command «mm»: 0xa0210048 => 0x87fa4048
Command «md»: 0xa02100ac => 0x87fa40ac
Command «saveenv»: 0xa0210624 => 0x87fa4624
Command «setenv»: 0xa0210f94 => 0x87fa4f94
Command «printenv»: 0xa0210674 => 0x87fa4674
Command «?»: 0xa0211268 => 0x87fa5268
Command «help»: 0xa0211268 => 0x87fa5268
Command «version»: 0xa0211128 => 0x87fa5128
Command «sc_boot»: 0xa0213ed4 => 0x87fa7ed4
Command «sc_nand»: 0xa0213f0c => 0x87fa7f0c
Command «sc_eth_test»: 0xa0213f48 => 0x87fa7f48
Command «sc_phy»: 0xa0213f84 => 0x87fa7f84
Command «sc_time»: 0xa0213fc0 => 0x87fa7fc0
Command «sc_btver»: 0xa0213ff8 => 0x87fa7ff8
Command «sc_fl_map»: 0xa0214034 => 0x87fa8034
Command «sc_endian»: 0xa0214070 => 0x87fa8070
Command «sc_ramtest»: 0xa02140ac => 0x87fa80ac
Command «sc_gpio»: 0xa02140e8 => 0x87fa80e8
Command «sc_led»: 0xa0214124 => 0x87fa8124
Command «sc_dl»: 0xa0214160 => 0x87fa8160
Allocate 16 byte aligned buffer: 87fca810
Enable NFI Clock
# MTK NAND # : Use HW ECC
NAND ID [C2 F1 80 95 02]
Device found in MTK table, ID: c2f1, EXT_ID: 809502
Support this Device in MTK table! c2f1
select_chip
[NAND]select ecc bit:4, sparesize :64 spare_per_sector=16
Signature matched and data read!
load_fact_bbt success 1023
load fact bbt success
[mtk_nand] probe successfully!
mtd->writesize=2048 mtd->oobsize=64, mtd->erasesize=131072 devinfo.iowidth=8
*** Warning — bad CRC, using default environment

============================================
Ralink UBoot Version: 5.0.0.0
———————————————
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: NAND Flash
Date:Mar 6 2018 Time:19:39:59
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 880 MHZ ####
estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL

Load Standalone from 40000
SC_DEBUG: Nand Partition Table Magic Found at 100000.

Waitting for RX_DMA_BUSY status Start. done

ETH_STATE_ACTIVE!!
ECC bytes for page : 28
DEBUG_INF:ecc bytes 28
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG:

has been read before erased!
DEBUG_DBG:

has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG:

has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG: has been read before erased!
DEBUG_DBG:=============================================
DEBUG_DBG:All parameters information listed:
DEBUG_DBG:=============================================
DEBUG_DBG:Partition Index 0, Name :
DEBUG_DBG:————————————
DEBUG_DBG:Param Name good_blk_idx offs_in_blk length Action of Erase-All
DEBUG_DBG:boot-version 4 ffb0 4 UPDATED
DEBUG_DBG:boot-pid 4 ffba 46 UPDATED
DEBUG_DBG:
DEBUG_DBG:Partition Index 2, Name :
DEBUG_DBG:————————————
DEBUG_DBG:Param Name good_blk_idx offs_in_blk length Action of Erase-All
DEBUG_DBG:calibration1 0 0 1000 KEPT
DEBUG_DBG:calibration2 0 8000 1000 KEPT
DEBUG_DBG:mac 1 1000 6 KEPT
DEBUG_DBG:CSN 1 1010 c KEPT
DEBUG_DBG:language ID 1 1040 4 KEPT
DEBUG_DBG:Domain ID 1 1050 4 KEPT
DEBUG_DBG:PCBASN 1 1060 c KEPT
DEBUG_DBG:PIN 1 1070 8 KEPT
DEBUG_DBG:SSID 1 1080 20 KEPT
DEBUG_DBG:Passphrase 1 10a0 40 KEPT
DEBUG_DBG:
DEBUG_DBG:Partition Index 3, Name :
DEBUG_DBG:————————————
DEBUG_DBG:Param Name good_blk_idx offs_in_blk length Action of Erase-All
DEBUG_DBG:boot_flag 0 0 8 UPDATED
DEBUG_DBG:boot_count1 1 1 1 UPDATED
DEBUG_DBG:boot_count2 1 2 1 UPDATED
DEBUG_DBG:
DEBUG_DBG:Partition Index 4, Name :
DEBUG_DBG:————————————
DEBUG_DBG:Param Name good_blk_idx offs_in_blk length Action of Erase-All
DEBUG_DBG:header_mian_kernel 0 0 100 UPDATED
DEBUG_DBG:
DEBUG_DBG:Partition Index 5, Name :
DEBUG_DBG:————————————
DEBUG_DBG:Param Name good_blk_idx offs_in_blk length Action of Erase-All
DEBUG_DBG:header_bk_kernel 0 0 100 UPDATED
DEBUG_DBG:
DEBUG_DBG:=============================================
DEBUG_DBG:init state, listening
DEBUG_DBG:state, listening
DEBUG_DBG:event, assign / set erase mode / console break
DEBUG_DBG:state, exit

Тут начинают мигать красным диоды, система стопорится.

DEBUG_INF:Console Ctrl C breaks dl process!
После отправки Ctrl+C появляется стандартное меню загрузчика Ralink/Mediatek:

Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
Пролетает мгновенно — ничего выбрать не удается

3: System Boot system code via Flash.
## Booting image at bc400000 .

По вопросам наполнения шапки обращайтесь к модераторам раздела через кнопку ЖАЛОБА под сообщениями

Сообщение отредактировал ninja88 — 10.10.21, 09:28

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